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QuickRing

From Wikipedia, the free encyclopedia

QuickRing was a gigabit-rate interconnect that combined the functions of a computer bus and a network. It was designed at Apple Computer as a multimedia system to run "on top" of existing local bus systems inside a computer, but was later taken over by National Semiconductor and repositioned as an interconnect for parallel computing. It appears to have seen little use in either role, and is no longer being actively worked on. However it appears to have been an inspiration for other more recent technologies, such as HyperTransport.

History

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QuickRing started as an offshoot of the fabled Futurebus project, which started in the late 1970s under the aegis of the IEEE. The Futurebus process quickly bogged down, and concluding it was doomed, several of the main designers left the effort in 1987 to try again on smaller projects, leading to both QuickRing and SCI.[1] In the case of QuickRing the main proponent was Paul Sweazey of National Semiconductor, who had hosted Futurebus's cache coherency group. Sweazey left National Semiconductor and moved to Apple Computer's Advanced Technology Group, where the new system was developed.

The system was first announced publicly at the 1992 Worldwide Developers Conference, positioned primarily as a secondary bus for computer systems to carry multiple streams of digital video without using the existing backplane bus.[2] Apple was particularly interested in this role due to the limitations of their current NuBus systems in terms of speed. They envisioned various video cards using a second connector located near the top of the card, opposite the NuBus connector on the bottom, to talk to each other. Optionally, one of the cards would produce compressed output, which could be sent over the NuBus for storage or display. Before any commercial use of QuickRing, newer versions of PCI started appearing that offered performance close enough to QuickRing to make its role redundant. Apple switched to an all-PCI based computer lineup starting in 1995, and in one of their general downsizings in the early 90s, Apple dropped their funding for QuickRing.

Sweazey moved back to National Semiconductor, who positioned QuickRing as a high-speed interconnect. Here it had little better luck, competing against SCI on one hand, and ever-faster versions of Ethernet on the other. Efforts were made to standardize QuickRing inside the existing VMEbus system using some redundant pins in response to an industry effort to standardize parallel processing hardware, but nothing ever came of this. The US Navy announced several tenders for QuickRing products for sonar data processing (for which they had originally had Futurebus+ developed), but it is unclear whether or not it was actually used in this role. National eventually lost interest, and the system essentially disappeared in 1996. Similar products, notably SKYconnect and Raceway, were also standardized in this role, but seem to have seen little use as well.

Description

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The basic QuickRing system consisted of a number of single-direction 1-bit serial links carrying data, and one extra line carrying a 50 MHz clock signal. Apple's implementation consisted of six data lines and the clock line using twisted-pair copper wiring (using LVDS) embedded in a thin plastic strip. National Semiconductor offered a variety of different implementations with up to 32 data lines,[2] as well as the same signals multiplexted using frequency-division multiplexing in a single fibre optic cable for longer links between machines.

The data lines were clocked at seven times the clock signal, so each clock "tick" moved 7 bits of data over each of the bus lines. For the Apple implementation this meant 7 bits times 6 links at 50 million times a second, for a raw data rate of 2.1 Gbit/s. Ten bits of the 42 were used for signalling and control, leaving 32 for data, resulting in a net data transfer rate of 1.6 Gbit/s, or 200 MB/s. This was only slightly faster than contemporary (1993) versions of PCI at ~130 MB/s, but much faster than NuBus of the same era, at about 20 MB/s.[3]

Each QuickRing interface contained two such links, one for "upstream" and one for "downstream" connections in a point-to-point ring. Since the system was not a bus, machines could talk up and downstream at the same time without interfering with other users. The drawback was that each hop over an intervening point added a latency of up to 1.3 μs. Since QuickRing was built in a ring topology there was no need for a dedicated switch or router, potentially making the system lower cost to deploy. Two rings could be connected together by putting the bus IC's "back to back" in a switch, allowing for larger networks.

QuickRing routing used a circuit switching system, in which the message path is set up before the data is sent, and once set up the connection is very lightweight. This is as opposed to packet switching, in which every message contains all of the data needed to reach the destination, this is more flexible, but adds overhead. Of the 10 bits of control data, four were used to specify a circuit number, allowing for a total of 16 devices per ring.

References

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Further reading

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  • The QuickRing Network, M. Valerio, L. E. Moser, P. M. Melliar-Smith and P. Sweazey, ACM Conference on Computer Science
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